I am a PhD candidate in the Circuits
and Systems Group at the Electrical and Electronic Engineering of
Imperial College London and
supervised by Professor
George A. Constantinides. I am also co-supervised by Dr. John Wickerson.
My PhD is supported and funded by the EPSRC Centre for Doctoral
Training in High Performance Embedded and Distributed Systems (HiPEDS).
Prior to the starting my PhD, I completed an MPhil in Advanced
Computer Science at University of Cambridge.
My research interest is mainly focused on generating efficient digital computation on field-programmable gate arrays (FPGAs). I am particularly interested in the efficiency of high-level synthesis (HLS) for FPGAs. HLS automatically generate digital hardware from an algorithmic description using a high-level programming language, instead of lower-level RTL or schematic design. Currently, I am exploring efficient synthesis of C-based (OpenCL, C/C++) multi-threaded programs for FPGAs.
Department of Electrical and Electronic Engineering
Imperial College London
South Kensington Campus, London SW7 2BT
Hardware Synthesis of Weakly Consistent C Concurrency
Nadesh Ramanathan, Shane T Fleming, John Wickerson, George A Constantinides
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
Supplementary Material: Talk and Source Code (GitHub, Zenodo)
A Case for Work-stealing on FPGAs with OpenCL Atomics
Nadesh Ramanathan, John Wickerson, Felix Winterstein, George A Constantinides
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
Supplementary Material: Talk and Source Code (GitHub)
A Case for Leveraging 802.11p for Direct Phone-to-Phone Communications
Pilsoon Choi, Jason Gao, Nadesh Ramanathan, Mengda Mao, Shipeng Xu, Chirn-Chye Boon,
Suhaib A. Fahmy and Li-Shiuan Peh
Proceedings of the 2014 International Symposium on Low Power Electronics and Design