I am a PhD candidate in the Circuits
and Systems Group at the Electrical and Electronic Engineering Department of
Imperial College London,
supervised by Professor
George A. Constantinides and co-supervised by Dr. John Wickerson.
My PhD is supported and funded by the EPSRC Centre for Doctoral
Training in High Performance Embedded and Distributed Systems (HiPEDS).
Prior to my PhD, I completed an MPhil in Advanced
Computer Science at University of Cambridge.
My broad research interest is on designing customisable digital circuits for field-programmable gate arrays (FPGAs).
I am particularly interested in the efficiency of high-level synthesis (HLS), a process in which software is mapped to custom hardware.
In my PhD, I explore the efficiency of high-level synthesis for multi-threaded C programs.
Department of Electrical and Electronic Engineering
Imperial College London
South Kensington Campus, London SW7 2BT
Scheduling Weakly Consistent C Concurrency for Reconfigurable Hardware
Nadesh Ramanathan, John Wickerson, George A Constantinides
IEEE Transactions on Computers
Supplementary Material on GitHub
Hardware Synthesis of Weakly Consistent C Concurrency
Nadesh Ramanathan, Shane T Fleming, John Wickerson, George A Constantinides
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
Supplementary Material: Talk and Source Code (GitHub, Zenodo)
A Case for Work-stealing on FPGAs with OpenCL Atomics
Nadesh Ramanathan, John Wickerson, Felix Winterstein, George A Constantinides
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
Supplementary Material: Talk and Source Code (GitHub)
A Case for Leveraging 802.11p for Direct Phone-to-Phone Communications
Pilsoon Choi, Jason Gao, Nadesh Ramanathan, Mengda Mao, Shipeng Xu, Chirn-Chye Boon,
Suhaib A. Fahmy and Li-Shiuan Peh
Proceedings of the 2014 International Symposium on Low Power Electronics and Design